1. Field of the Invention
The present invention relates to a semiconductor fabrication process. More particularly, the present invention relates to a method for forming a trench gate dielectric layer.
2. Description of the Related Art
Transistor is one of the basic semiconductor devices commonly used in integrated circuits such as dynamic random access memory devices, flash memories and logic devices. In the fabrication of transistors, the quality of gate oxide layer is one of the critical factors that determine the ultimate electrical properties of the transistor.
FIGS. 1A through 1D are schematic cross-sectional views showing the steps for producing a conventional gate oxide layer.
First, as shown in FIG. 1A, a substrate 100 having a patterned silicon oxide layer 102 and a patterned silicon nitride layer 104 thereon is provided. Then, a trench 106 is formed in the substrate 100. The trench 106 is formed, for example, by performing an etching process using the patterned silicon oxide layer 102 and the patterned silicon nitride layer 104 as a mask to remove a portion of the substrate 100.
However, because of the effects of the aforementioned etching process on the exposed surface of the substrate 100, a portion of the surface may be damaged or become uneven after the trench-forming process. The damaged and/or uneven surface often affects the quality of subsequently formed gate oxide layer.
To reduce the defects on the surface of the substrate 100, an oxidation process is often performed to form an oxide layer 108 on the substrate 100 as shown in FIG. 1B. The oxide layer 108 is formed by performing a furnace oxidation process carried out at a temperature of about 800° C. inside a furnace.
As shown in FIG. 1C, the oxide layer 108 is removed. The method of removing the oxide layer 108 includes performing an etching process, for example. The purpose of removing the oxide layer 108 is to remove any defects in the substrate 100 along with the oxide layer 108. Hence, the aforementioned oxide layer 108 is also referred to as a sacrificial layer.
As shown in FIG. 1D, a thermal oxidation process is performed to produce a gate oxide layer 120 on the exposed substrate 100 surface of the trench 106a. 
However, the aforementioned method of forming the gate oxide layer has a number of problems. In the furnace oxidation process for forming the sacrificial layer (the oxide layer 108), sharp corners (as shown in the top edge region 107 and the bottom edge region 109 in FIG. 1B) are often formed. This phenomenon will result in the production of leakage current. In addition, occurred stress may affect the substrate 100 leading to additional problems. Besides, the thickness of the gate oxide layer 120 formed by the aforementioned thermal oxidation process is unlikely to be uniform. Furthermore, the heat may damage the crystal lattice near the surface of the substrate 100 and affect the processing reliability. Moreover, a gate oxide layer 120 having an uneven thickness can easily lead to the problems of leakage current and breakdown voltage.